Optical chips, also known as photonic integrated circuits, are devices suitable for performing various functions on one or more optical signals.
Individual optical chips are commonly produced by constructing a plurality of optical chips on a semiconductor wafer substrate and cleaving the wafer into a plurality of individual optical chips. Typically the optical chips are designed and laid out on the wafer with little or no consideration of relationship of one chip to the other while still in wafer form.
In many instances it is desirable that the individual optical chips are tested for their intended use or function. Testing of the individual optical chips is typically performed after the optical chips have been cleaved from the wafer. But the testing of cleaved optical chips is time consuming and costly.
The testing of individual optical chips while they are still in wafer form has been contemplated. For example, US Patent Application Publication No. US2004/0013359 discusses the use of an optical probe that is optically coupled to the optical chip at an access point. In principle, such testing enables earlier testing of the optical chips in the production cycle. But utilizing an optical probe in the individual testing of the optical chips still requires considerable alignment time. Furthermore, testing optical chips with the optical probe together with a necessary electrical probe provides practical difficulties in implementation.
In some cases, components built into an optical chip can be used to test the functionality of that optical chip. For example, a photodiode that is to be used in the finished product could be used to test the performance of the optical chip while still in wafer form. However, a typical optical device such as an optical transmitter or modulator generates a high power optical output, and an on-chip photodiode would be placed on a tap. As a result, the on-chip photodiode only receives a small proportion of the output light. Such use of an on-board photodiode does not enable a full set of optical tests on the wafer, including a full power test.